\ud83d\udc49\ufe0f \ucf54\ub4dc\uc124\uba85 \/Code Explanation<\/p>\n\n\n\n
\u2714\ufe0f 16\ube44\ud2b8\ubaa8\ub4dc\uc5d0\uc11c \uc0ac\uc6a9\ud558\ub358 \ub808\uc9c0\uc2a4\ud130\ub97c GDT\uc758 \ub370\uc774\ud130\ub808\uc9c0\uc2a4\ud130(0x10)\ub85c \ucd08\uae30\ud654\ud558\ub294 \ubd80\ubd84\uc785\ub2c8\ub2e4.
This section initializes the registers used in 16-bit mode with the GDT data segment selector (0x10).<\/p>\n\n\n\n
bits 32\n\nprotected_start:\n ; 32\ube44\ud2b8\uc6a9 \ub370\uc774\ud130 \uc138\uadf8\uba3c\ud2b8 \ub808\uc9c0\uc2a4\ud130\ub4e4 \ucd08\uae30\ud654 (GDT\uc758 0x10 \uc624\ud504\uc14b \uc0ac\uc6a9)\n ; Initialize 32-bit data segment registers (Using 0x10 offset from GDT)\n mov ax, 0x10\n mov ds, ax\n mov es, ax\n mov fs, ax\n mov gs, ax\n mov ss, ax<\/code><\/pre>\n\n\n\n— 32\ube44\ud2b8 \ubaa8\ub4dc\uc5d0\uc11c \ubc94\uc6a9\ub808\uc9c0\uc2a4\ud130\ub294 32\ube44\ud2b8\uc6a9\uc744 \uc0ac\uc6a9\ud560 \uc218 \uc788\uc2b5\ub2c8\ub2e4.
In 32-bit mode, 32-bit general-purpose registers can be used.<\/p>\n\n\n\n
— \ud558\uc9c0\ub9cc \uc138\uadf8\uba3c\ud2b8 \ub808\uc9c0\uc2a4\ud130(CS, DS, ES, FS, GS, SS)\ub294 \ud56d\uc0c1 16\ube44\ud2b8\uc785\ub2c8\ub2e4.
However, the segment registers (CS, DS, ES, FS, GS, SS) are always 16-bit.<\/p>\n\n\n\n
— 32\ube44\ud2b8\ubaa8\ub4dc\uc5d0\uc11c \uc138\uadf8\uba3c\ud2b8 \ub808\uc9c0\uc2a4\ud130\ub294 \uc8fc\uc18c\uac00 \uc544\ub2c8\ub77c GDT\uc758 \uc120\ud0dd\uc790\uac00 \uc800\uc7a5\ub429\ub2c8\ub2e4.
In 32-bit mode, segment registers store GDT selectors rather than addresses.<\/p>\n\n\n\n
— GDT\uc758 \uc120\ud0dd\uc790\ub294 16\ube44\ud2b8\uc785\ub2c8\ub2e4. \uadf8\ub798\uc11c \uc138\uadf8\uba3c\ud2b8 \ub808\uc9c0\uc2a4\ud130\ub3c4 16\ube44\ud2b8\ub97c \uc0ac\uc6a9\ud569\ub2c8\ub2e4.
The GDT selector is 16 bits; therefore, segment registers also use 16 bits.<\/p>\n\n\n\n
— ax\ub294 \ubc94\uc6a9\ub808\uc9c0\uc2a4\ud130(General purpose register)\uc785\ub2c8\ub2e4.
ax is a general-purpose register.<\/p>\n\n\n\n
— \uac01 \uc138\uadf8\uba3c\ud2b8 \ub808\uc9c0\uc2a4\ud130\uc758 \uc5ed\ud560
The role of each segment register<\/p>\n\n\n\n\ub808\uc9c0\uc2a4\ud130 \/ register<\/th> \uc758\ubbf8 \/ meaning<\/th> \uc77c\ubc18\uc801\uc778 \uc6a9\ub3c4 \/ General Use<\/th><\/tr><\/thead> CS<\/td> Code Segment<\/td> \uc2e4\ud589 \uc911\uc778 \ucf54\ub4dc
Running code<\/td><\/tr> DS<\/td> Data Segment<\/td> \uc77c\ubc18 \ub370\uc774\ud130
General Data<\/td><\/tr> ES<\/td> Extra Segment<\/td> \ucd94\uac00 \ub370\uc774\ud130(\ubb38\uc790\uc5f4 \uba85\ub839 \ub4f1)
Additional data (string commands, etc.)<\/td><\/tr> SS<\/td> Stack Segment<\/td> \uc2a4\ud0dd \/ Stack<\/td><\/tr> FS<\/td> Extra Segment<\/td> \uc6b4\uc601\uccb4\uc81c\uac00 \uc790\uc720\ub86d\uac8c \uc0ac\uc6a9
The operating system is free to use<\/td><\/tr> GS<\/td> Extra Segment<\/td> \uc6b4\uc601\uccb4\uc81c\uac00 \uc790\uc720\ub86d\uac8c \uc0ac\uc6a9
The operating system is free to use<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n— \ub098\uc911\uc5d0 \uc6b4\uc601\uccb4\uc81c\uac00 \ubc1c\uc804\ud558\uba74 FS\ub098 GS\ub97c \uc2a4\ub808\ub4dc \uc815\ubcf4\ub098 CPU\ubcc4 \ub370\uc774\ud130 \ub4f1 \ud2b9\uc218\ud55c \uc6a9\ub3c4\ub85c \uc0ac\uc6a9\ud560 \uc218 \uc788\uc2b5\ub2c8\ub2e4.
As the operating system evolves, FS or GS can be used for special purposes, such as thread information or CPU-specific data.<\/p>\n\n\n\n
— \uc9c0\uae08\uc740 FS,GS\uac00 \ud2b9\ubcc4\ud55c \ubaa9\uc801\uc774 \uc5c6\uae30 \ub54c\ubb38\uc5d0 FS\uc640 GS\ub3c4 \ubaa8\ub450 0x10(\ub370\uc774\ud130 \uc138\uadf8\uba3c\ud2b8) \uc73c\ub85c \ucd08\uae30\ud654 \ud574\ub461\ub2c8\ub2e4.
Since FS and GS currently serve no specific purpose, they are both initialized to 0x10 (data segment).<\/p>\n\n\n\n
\u2714\ufe0f \ud654\uba74\uc5d0 \ube68\uac04\uc0c9 \uc0ac\uac01\ud615\uc744 \uadf8\ub9bd\ub2c8\ub2e4.
Draw a red rectangle on the screen.<\/p>\n\n\n\n
— \ube44\ub514\uc624 \uce74\ub4dc \uba54\ubaa8\ub9ac\ub97c \uc0ac\uc6a9\ud569\ub2c8\ub2e4.
It uses video card memory.<\/p>\n\n\n\n
mov edi, 0xA0000 ; \ube44\ub514\uc624 \uba54\ubaa8\ub9ac \uc2dc\uc791 \ubb3c\ub9ac \uc8fc\uc18c\n ; Video memory starting physical address<\/code><\/pre>\n\n\n\n1) 0xA0000\ub294 \ube44\ub514\uc624 \uce74\ub4dc \uba54\ubaa8\ub9ac(Video RAM, VRAM)\uc758 \uc8fc\uc18c\uc785\ub2c8\ub2e4.
0xA0000 is the address for video card memory (Video RAM, VRAM).<\/p>\n\n\n\n
2)\uc774 \ubaa8\ub4dc\uc5d0\uc11c\ub294 \ube44\ub514\uc624 \uba54\ubaa8\ub9ac\uac00 0xA0000\ubd80\ud130 \uc2dc\uc791\ud558\ub3c4\ub85d \uc815\ud574\uc838 \uc788\uc2b5\ub2c8\ub2e4.
In this mode, the video memory is set to start at 0xA0000.<\/p>\n\n\n\n
3)mov edi, 0xA0000\ucc98\ub7fc edi\uc5d0 \ube44\ub514\uc624\uba54\ubaa8\ub9ac \uc8fc\uc18c\ub97c \uc800\uc7a5\ud558\ub294 \uc774\uc720\ub294 edi\ub97c \ud3ec\uc778\ud130 \ucc98\ub7fc \uc0ac\uc6a9\ud558\uae30 \uc704\ud574\uc11c\uc785\ub2c8\ub2e4.
The reason for storing the video memory address in edi<\/code>\u2014such as in mov edi, 0xA0000<\/code>\u2014is to use edi<\/code> as a pointer.<\/p>\n\n\n\n4) \uc544\ub798\uc758 \ucf54\ub4dc\ub97c \uc2e4\ud589\ud558\uba74 cpu\ub294 0xA0000 \uc8fc\uc18c\uc5d0 12\ub97c \uae30\ub85d \ud569\ub2c8\ub2e4.
When the code below is executed, the CPU writes 12 to the address 0xA0000.<\/p>\n\n\n\n
4-1) 1\ud53d\uc140\uc740 1\ubc14\uc774\ud2b8\uc785\ub2c8\ub2e4.\ud654\uba74\uc758 \uccab\ubc88\uc9f8 \ud53d\uc140\uc774 \ube68\uac04\uc0c9\uc73c\ub85c \ubc14\ub01d\ub2c8\ub2e4.
One pixel is one byte. The first pixel on the screen changes to red.<\/p>\n\n\n\n
4-2) 32\ube44\ud2b8\uc5d0\uc11c\ub3c4 \ud574\uc0c1\ub3c4\uac00 \uadf8\ub300\ub85c\uc778 \uc774\uc720\ub294 \ubd80\ud2b8\ub85c\ub354\uc5d0\uc11c BIOS\uac00 VGA\ub97c \uc774\ubbf8 Mode 13h(320\u00d7200, 256\uc0c9)\ub85c \uc124\uc815\ud574 \ub193\uc558\uae30 \ub54c\ubb38\uc785\ub2c8\ub2e4.(mov al, 0x13)
The reason the resolution remains unchanged in 32-bit mode is that the BIOS had already set the VGA to Mode 13h (320\u00d7200, 256 colors) during the bootloader stage (mov al, 0x13<\/code>).<\/p>\n\n\n\nboot.asm\nmov ah, 0x00\nmov al, 0x13\nint 0x10<\/code><\/pre>\n\n\n\n4-3) \uc6b4\uc601\uccb4\uc81c\uac00 \uc644\uc804\ud788 \uc644\uc131\ub41c \ud6c4\uc5d0 \uadf8\ub798\ud53d\uce74\ub4dc\uc758 \ub808\uc9c0\uc2a4\ud130\ub97c \ud1b5\ud574\uc11c \ud574\uc0c1\ub3c4\ub97c \uc644\uc804\ud788 1080p\ub4f1\uc73c\ub85c \uc124\uc815 \ud560 \uc218 \uc788\uc2b5\ub2c8\ub2e4.
Once the operating system has fully loaded, you can configure the resolution\u2014such as 1080p\u2014via the graphics card’s registers.<\/p>\n\n\n\n
mov edi, 0xA0000\nmov byte [edi], 12<\/code><\/pre>\n\n\n\n
\n\n\n\n— \ud654\uba74\uc5d0 \ud45c\uc2dc\ub420 \uc0ac\uac01\ud615\uc758 \uc2dc\uc791 \uc704\uce58\ub294 16100\uc785\ub2c8\ub2e4.
The starting position of the rectangle to be displayed on the screen is 16100.<\/p>\n\n\n\n
add edi, 16100<\/code><\/pre>\n\n\n\n1)\ube44\ub514\uc624 \uba54\ubaa8\ub9ac\ub294 1\ucc28\uc6d0(\uc77c\ub82c)\ub85c \uc800\uc7a5\ub418\uc5b4 \uc788\uace0, \uc6b0\ub9ac\uac00 320\ud53d\uc140\uc744 \ud55c \uc904\uc774\ub77c\uace0 \uc57d\uc18d\ud574\uc11c \uacc4\uc0b0\ud569\ub2c8\ub2e4.
Video memory is stored in a one-dimensional (linear) format, and calculations are performed based on the convention that a single line consists of 320 pixels.<\/p>\n\n\n\n
2) VGA\uac00 320\uac1c\uc529 \ub04a\uc5b4\uc11c \ud654\uba74\uc5d0 \ud45c\uc2dc\ud569\ub2c8\ub2e4.
The VGA displays the image on the screen in chunks of 320.<\/p>\n\n\n\n
3) \uadf8\ub798\uc11c \ub2e4\uc74c\uacfc \uac19\uc774 \uacc4\uc0b0\ub429\ub2c8\ub2e4.
Therefore, it is calculated as follows.<\/p>\n\n\n\n
edi = 0xA0000 + (50 \u00d7 320) + 100 = 0xA0000 + 16100<\/code><\/pre>\n\n\n\nVRAM \uc8fc\uc18c\/Address = 0xA0000 + (Y \u00d7 320) + X<\/code><\/pre>\n\n\n\n3-1) \uc2dc\uc791 \uc704\uce58\ub294 Y=50,X=100\uc785\ub2c8\ub2e4.
The starting position is Y=50, X=100.<\/p>\n\n\n\n
3-2) edx\uc640 ecx\ub294 \ubc94\uc6a9\ub808\uc9c0\uc2a4\ud130\ub85c Y\uc640 X\uc758 \ub8e8\ud504 \uce74\uc6b4\ud130\ub85c \uc0ac\uc6a9\ub429\ub2c8\ub2e4.
EDX and ECX are general-purpose registers used as loop counters for Y and X.<\/p>\n\n\n\n
mov edx, 0 ; Y \ub8e8\ud504 \uce74\uc6b4\ud130 (\uc138\ub85c 30\uc904)\n ; Y loop counter (30 rows)\n\ndraw_32bit_row:\n mov ecx, 0 ; X \ub8e8\ud504 \uce74\uc6b4\ud130 (\uac00\ub85c 50\uce78)\n ; X loop counter (50 columns)<\/code><\/pre>\n\n\n\n\u2705 x86\uc758 32\ube44\ud2b8 \ubc94\uc6a9 \ub808\uc9c0\uc2a4\ud130
x86 32-bit general-purpose registers<\/p>\n\n\n\n
\ub300\ud45c\uc801\uc73c\ub85c 8\uac1c\uc758 \ubc94\uc6a9 \ub808\uc9c0\uc2a4\ud130\uac00 \uc788\uc2b5\ub2c8\ub2e4.
There are eight general-purpose registers.<\/p>\n\n\n\n32\ube44\ud2b8\/32bit<\/th> 16\ube44\ud2b8\/16bit<\/th> 8\ube44\ud2b8\/8bit<\/th><\/tr><\/thead> EAX<\/td> AX<\/td> AH \/ AL<\/td><\/tr> EBX<\/td> BX<\/td> BH \/ BL<\/td><\/tr> ECX<\/strong><\/td>CX<\/td> CH \/ CL<\/td><\/tr> EDX<\/strong><\/td>DX<\/td> DH \/ DL<\/td><\/tr> ESI<\/td> SI<\/td> –<\/td><\/tr> EDI<\/td> DI<\/td> –<\/td><\/tr> EBP<\/td> BP<\/td> –<\/td><\/tr> ESP<\/td> SP<\/td> –<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n
\n\n\n\n— \ube68\uac04\uc0c9 \ud53d\uc140\uc744 \ubc18\ubcf5\ud574\uc11c \ucc44\uc6c1\ub2c8\ub2e4.
Repeatedly fill with red pixels.<\/p>\n\n\n\n
draw_32bit_col:\n mov byte [edi], 12 ; \uc0c9\uc0c1 \ubc88\ud638 \ub300\uc785 (12 = \ube68\uac04\uc0c9)\n ; Assign color number (12 = Red)\n inc edi ; \ub2e4\uc74c \ud53d\uc140 \uc8fc\uc18c\ub85c \uc774\ub3d9\n ; Move to the next pixel address\n inc ecx\n cmp ecx, 50\n jl draw_32bit_col<\/code><\/pre>\n\n\n\n1) jl\uc740 Jump if Less\uc785\ub2c8\ub2e4.
jl stands for “Jump if Less.”<\/p>\n\n\n\n
2) ecx\uac12\uc774 50 \ubcf4\ub2e4 \uc791\uc73c\uba74 draw_32bit_col\ub85c \uc810\ud504\ud569\ub2c8\ub2e4.
If the ecx value is less than 50, it jumps to draw_32bit_col.<\/p>\n\n\n\n
3) \uac00\ub85c \ubc29\ud5a5\uc73c\ub85c 50\uac1c\uc758 \ud53d\uc140\uc744 \uadf8\ub9b4 \ub54c\uae4c\uc9c0 \ubc18\ubcf5\ud558\ub294 \uc870\uac74\ubb38\uc785\ub2c8\ub2e4.
This is a conditional statement that repeats until 50 pixels are drawn horizontally.<\/p>\n\n\n\n
\n\n\n\n— \uc904 \ubc14\uafc8\ud574\uc11c \uc138\ub85c \ubc29\ud5a5\uc73c\ub85c 30\uac1c\uc758 \ud53d\uc140\uc744 \uadf8\ub9b4\ub54c \uae4c\uc9c0 \ubc18\ubcf5\ud558\ub294 \uc870\uac74\ubb38\uc785\ub2c8\ub2e4.
This is a conditional statement that repeats the process, inserting line breaks and drawing 30 pixels vertically.<\/p>\n\n\n\n
; \uac00\ub85c \ud55c \uc904\uc744 \ub2e4 \uadf8\ub838\uc73c\uba74, \ub2e4\uc74c \uc904\uc758 \uc2dc\uc791\uc810\uc73c\ub85c EDI \ud3ec\uc778\ud130 \uac74\ub108\ub6f0\uae30\n ; After drawing one row, skip EDI pointer to the start of the next row\n ; \ud55c \uc904\uc774 320\ud53d\uc140\uc778\ub370 \ubc29\uae08 50\ud53d\uc140\uc744 \uc804\uc9c4\ud588\uc73c\ubbc0\ub85c, \ub0a8\uc740 270\ud53d\uc140\ub9cc\ud07c \ub354\ud574\uc90d\ub2c8\ub2e4.\n ; Since a single line is 320 pixels and we have just advanced 50 pixels, we add the remaining 270 pixels.\n\n add edi, 270\n \n inc edx\n cmp edx, 30\n jl draw_32bit_row\n\n ; \uc791\uc5c5 \uc644\ub8cc \ud6c4 \ubb34\ud55c \ub300\uae30\n ; Infinite loop after work completion\n jmp $<\/code><\/pre>\n\n\n\n
\n\n\n\n\u2705 \ub2e4\uc74c \ud3ec\uc2a4\ud2b8\uc5d0\uc11c \uacc4\uc18d \ub429\ub2c8\ub2e4.
To be continued in the next post.<\/p>\n","protected":false},"excerpt":{"rendered":"
\ud83d\udc49\ufe0f \ucf54\ub4dc\uc124\uba85 \/Code Explanation \u2714\ufe0f 16\ube44\ud2b8\ubaa8\ub4dc\uc5d0\uc11c \uc0ac\uc6a9\ud558\ub358 \ub808\uc9c0\uc2a4\ud130\ub97c GDT\uc758 \ub370\uc774\ud130\ub808\uc9c0\uc2a4\ud130(0x10)\ub85c \ucd08\uae30\ud654\ud558\ub294 \ubd80\ubd84\uc785\ub2c8\ub2e4.This section initializes the registers used in 16-bit mode with the GDT data segment selector (0x10). — 32\ube44\ud2b8 \ubaa8\ub4dc\uc5d0\uc11c \ubc94\uc6a9\ub808\uc9c0\uc2a4\ud130\ub294 32\ube44\ud2b8\uc6a9\uc744 \uc0ac\uc6a9\ud560 \uc218 \uc788\uc2b5\ub2c8\ub2e4.In 32-bit mode, 32-bit general-purpose registers can be used. — \ud558\uc9c0\ub9cc \uc138\uadf8\uba3c\ud2b8 \ub808\uc9c0\uc2a4\ud130(CS, DS, ES, FS, GS, SS)\ub294 \ud56d\uc0c1 16\ube44\ud2b8\uc785\ub2c8\ub2e4.However, the […]<\/p>\n","protected":false},"author":1,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[26,1],"tags":[],"class_list":["post-6103","post","type-post","status-publish","format-standard","hentry","category-os","category-uncategorized","missing-thumbnail"],"_links":{"self":[{"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/posts\/6103","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/comments?post=6103"}],"version-history":[{"count":3,"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/posts\/6103\/revisions"}],"predecessor-version":[{"id":6106,"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/posts\/6103\/revisions\/6106"}],"wp:attachment":[{"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/media?parent=6103"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/categories?post=6103"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.freelifemakers.org\/wordpress\/index.php\/wp-json\/wp\/v2\/tags?post=6103"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}